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EL5102, EL5103, EL5202, EL5203, EL5302
Data Sheet August 4, 2004 FN7331.1
PRELIMINARY
400MHz Slew Enhanced VFAs
The EL5x02 and EL5x03 families represent high-speed VFAs based on a CFA amplifier architecture. This gives the typical high slew rate benefits of a CFA family along with the stability and ease of use associated with the VFA type architecture. With slew rates of 3500V/s this family of devices enables the use of voltage feedback amplifiers in a space where the only alternative has been current feedback amplifiers. This family will also be available in single, dual, and triple versions, with 200MHz, 400MHz, and 750MHz versions. These are all available in single, dual, and triple versions. Both families operate on single 5V or 5V supplies from minimum supply current. EL5x02 also features an output enable function, which can be used to put the output in to a high-impedance mode. This enables the outputs of multiple amplifiers to be tied together for use in multiplexing applications. Typical applications for these families will include cable driving, filtering, A-to-D and D-to-A buffering, multiplexing and summing within video, communications, and instrumentation designs.
Features
* Operates off 3V, 5V, or 5V applications * Power-down to 0A (EL5x02) * -3dB bandwidth = 400MHz * 0.1dB bandwidth = 50MHz * Low supply current = 5mA * Slew rate = 3500V/s * Low offset voltage = 5mV max * Output current = 140mA * AVOL = 2000 * Diff gain/phase = 0.01%/0.01
Applications
* Video amplifiers * PCMCIA applications * A/D drivers * Line drivers * Portable computers * High speed communications * RGB applications * Broadcast equipment * Active filtering
Ordering Information
PART NUMBER EL5102IS EL5102IS-T7 EL5102IS-T13 EL5102IW-T7 EL5102IW-T7A EL5103IC-T7 EL5103IC-T7A EL5103IW-T7 EL5103IW-T7A EL5202IY EL5202IY-T7 PACKAGE 8-Pin SO 8-Pin SO 8-Pin SO 6-Pin SOT-23 6-Pin SOT-23 5-Pin SC-70 5-Pin SC-70 5-Pin SOT-23 5-Pin SOT-23 10-Pin MSOP 10-Pin MSOP TAPE & REEL 7" 13" 7" (3K pcs) 7" (250 pcs) 7" (3K pcs) 7" (250 pcs) 7" (3K pcs) 7" (250 pcs) 7" PKG. DWG. # MDP0027 MDP0027 MDP0027 MDP0038 MDP0038 P5.049 P5.049 MDP0038 MDP0038 MDP0043 MDP0043 PART NUMBER EL5202IY-T13 EL5203IS EL5203IS-T7 EL5203IS-T13 EL5203IY EL5203IY-T7 EL5203IY-T13 EL5302IU EL5302IU-T7 EL5302IU-T13 PACKAGE 10-Pin MSOP 8-Pin SO 8-Pin SO 8-Pin SO 8-Pin MSOP 8-Pin MSOP 8-Pin MSOP 16-Pin QSOP 16-Pin QSOP 16-Pin QSOP TAPE & REEL 13" 7" 13" 7" 13" 7" 13" PKG. DWG. # MDP0043 MDP0027 MDP0027 MDP0027 MDP0043 MDP0043 MDP0043 MDP0040 MDP0040 MDP0040
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002-2004. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners.
EL5102, EL5103, EL5202, EL5203, EL5302 Pinouts
EL5102 (6-PIN SOT-23) TOP VIEW
OUT 1 VS- 2 IN+ 3 +6 VS+ 5 CE 4 INOUT 1 VS- 2 IN+ 3 +4 IN-
EL5103 (5-PIN SOT-23) TOP VIEW
5 VS+
EL5102 (8-PIN SO) TOP VIEW
NC 1 IN- 2 IN+ 3 VS- 4 + 8 CE 7 VS+ 6 OUT 5 NC
EL5203 (8-PIN SO, MSOP) TOP VIEW
OUTA 1 INA- 2 INA+ 3 VS- 4 + + 8 VS+ 7 OUTB 6 INB5 INB+
EL5202 (10-PIN MSOP) TOP VIEW
INA+ 1 CEA 2 VS- 3 CEB 4 INB+ 5 + + 10 INA9 OUTA 8 VS+ 7 OUTB 6 INBINA+ 1 CEA 2 VS- 3 CEB 4 INB+ 5 NC 6 CEC 7 INC+ 8
EL5302 (16-PIN QSOP) TOP VIEW
16 INA+ 15 OUTA 14 VS+ + 13 OUTB 12 INB11 NC + 10 OUTC 9 INC-
2
EL5102, EL5103, EL5202, EL5203, EL5302
Absolute Maximum Ratings (TA = 25C)
Supply Voltage between VS+ and GND. . . . . . . . . . . . . . . . . . 13.2V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4V Maximum Continuos Output Current . . . . . . . . . . . . . . . . . . . . 80mA Maximum Current into IN+, IN-, CE . . . . . . . . . . . . . . . . . . . . . 5mA Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Storage Temperature Range . . . . . . . . . . . . . . . . . .-65C to +150C Ambient Operating Temperature Range . . . . . . . . . .-40C to +85C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
DC Electrical Specifications
PARAMETER VOS
VS+ = +5V, VS- = -5V, TA = 25C, RL = 150, VENABLE = +5V, unless otherwise specified. CONDITIONS EL5102, EL5103, EL5202, EL5203 EL5302 MIN TYP 1 2 10 -12 -8 2 1 50 -70 -60 -3 200 -80 -80 3.3 400 1 4.6 5.2 0 5 58 7 66 60 3.5 3.4 80 (VS+)1V (VS+)3V CE = 0V CE = +5V 5 0 14 1 25 3.9 3.7 150 5.8 7 25 3 12 8 MAX 5 8 UNIT mV mV V/C A A nA/C dB dB V k pF mA A A dB dB V V mA V V A A
DESCRIPTION Offset Voltage
TCVOS IB IOS TCIOS PSRR CMRR CMIR RIN CIN IS,ON IS,OFF
Offset Voltage Temperature Coefficient Input Bias Current Input Offset Current Input Bias Current Temperature Coefficient Power Supply Rejection Ratio Common Mode Rejection Ratio Common Mode Input Range Input Resistance Input Capacitance Supply Current - Enabled per amplifier
Measured from TMIN to TMAX VIN = 0V VIN = 0V Measured from TMIN to TMAX VS = 4.75V to 5.25V VCM = -3V to 3.0V Guaranteed by CMRR test Common mode SO package
Supply Current - Shut-down per amplifier VS+ VS-
AVOL
Open Loop Gain
VOUT = 2.5V, RL = 1k to GND VOUT = 2.5V, RL = 150 to GND
VOUT
Output Voltage Swing
RL = 1k to GND RL = 150 to GND
IOUT VCE-ON VCE-OFF IEN-ON IEN-OFF
Output Current CE Pin Voltage for Power-up CE Pin Voltage for Shut-down Pin Current - Enabled Pin Current - Disabled
AV = 1, RL = 10 to 0V
3
EL5102, EL5103, EL5202, EL5203, EL5302
Closed Loop AC Electrical Specifications VS+ = +5V, VS- = -5V, TA = 25C, VENABLE = +5V, AV = +1, RF = 0, RL = 150 to GND
pin, unless otherwise specified. (Note 1) PARAMETER BW SR DESCRIPTION -3dB Bandwidth (VOUT = 400mVP-P) Slew Rate CONDITIONS AV = 1, RF = 0 AV = +2, RL = 100, VOUT = -3V to +3V RL = 500, VOUT = -3V to +3V tR,tF OS tS dG dP eN iN tDIS tEN NOTES: 1. All AC tests are performed on a "warmed up" part, except slew rate, which is pulse tested. 2. Standard NTSC signal = 286mVP-P, f = 3.58MHz, as VIN is swept from 0.6V to 1.314V.RL is DC coupled. 3. Disable/Enable time is defined as the time from when the logic signal is applied to the ENABLE pin to when the supply current has reached half its final value. Rise Time, Fall Time Overshoot 0.1% Settling Time Differential Gain (Note 2) Differential Phase (Note 2) Input Noise Voltage Input Noise Current Disable Time (Note 3) Enable Time (Note 3) 0.1V step 0.1V step VS = 5V, RL = 500, AV = 1, VOUT = 3V AV = 2, RF = 1k AV = 2, RF = 1k f = 10kHz f = 10kHz 1100 MIN TYP 400 2200 4000 2.8 10 20 0.01 0.01 6 1.25 50 25 5000 MAX UNIT MHz V/s V/s ns % ns % nV/Hz pA/Hz ns ns
Typical Performance Curves
80 70 60 50 GAIN (dB) 40 30 20 10 0 -10 -20 10 VCC=+5V VEE=-5V 100 1K 10K 100K 1M FREQUENCY (Hz)
-45 0 45 90 135 180 225 270 315 360 405 10M 100M 1G PHASE () NORMALIZED GAIN (dB)
5 4 3 2 1 0 -1 -2 -3 -4
AV=+1 CL=2.2pF 500 200 100
10 50
-5 100K
1M
10M FREQUENCY (Hz)
100M
700M
FIGURE 1. OPEN LOOP GAIN AND PHASE vs FREQUENCY
FIGURE 2. GAIN vs FREQUENCY FOR VARIOUS RL
4
EL5102, EL5103, EL5202, EL5203, EL5302 Typical Performance Curves
5 NORMALIZED GAIN (dB) 4 3 2 1 0 -1 -2 -3 -4
NORMALIZED GAIN (dB)
AV=+2 CL=2.5pF RG=270 500 150
5 4 3 2 1 0 -1 -2 -3 -4 -5 100K 50 10 AV=+5 CL=2.5pF RG=270 1.5k 500 150
10 50
-5 100K
1M
10M FREQUENCY (Hz)
100M
700M
1M
10M
100M
FREQUENCY (Hz)
FIGURE 3. GAIN vs FREQUENCY FOR VARIOUS RL
FIGURE 4. GAIN vs FREQUENCY FOR VARIOUS RL
NORMALIZED GAIN (dB)
AV=+1 4 RL=500 NORMALIZED GAIN (dB) 3 2 1 0 -1 -2 -3 -4 -5 100K 1M 10M
5
5 27pF 18pF 12pF 5.6pF 4 3 2 1 0 -1 -2 -3 -4 100M 1G
AV=+2 RL=500 RG=270
33pF 27pF 18pF
8.2pF 2.2pF
2.2pF
-5 100K
1M
10M
100M 200M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 5. GAIN vs FREQUENCY FOR VARIOUS CL
FIGURE 6. GAIN vs FREQUENCY FOR VARIOUS CL
5 NORMALIZED GAIN (dB) 3 2 1 0 -1 -2 -3 -4 -5 100K 1M 10M 100M 2.2pF NORMALIZED GAIN (dB) 4 AV=+5 RL=500 RG=270 168pF 112pF 56pF 27pF 18pF
5 4 3 2 1 0 -1 -2 -3 -4 100K 1M 10M FREQUENCY (Hz) 100M 500M 0pF AV=+2 RL=500 CL=2.2pF RG=270 3.9pF 2.2pF
FREQUENCY (Hz)
FIGURE 7. GAIN vs FREQUENCY FOR VARIOUS CL
FIGURE 8. GAIN vs FREQUENCY FOR VARIOUS CIN-
5
EL5102, EL5103, EL5202, EL5203, EL5302 Typical Performance Curves
5 NORMALIZED GAIN (dB) 4 3 2 1 0 -1 -2 -3 -4
5 NORMALIZED GAIN (dB) AV=+5 RL=500 CL=2.2pF RG=270 40pF 28pF 16pF 4 2 1 0
AV=+1 CL=2.5pF 3 RL=500
1.7V 1.8V 1.9V 2.0V 3.0V 4.0V 5.0V
-1 -2 -3 -4 -5 100K
3.9pF
-5 100K
1M
10M
100M
1M
10M FREQUENCY (Hz)
100M
1G
FREQUENCY (Hz)
FIGURE 9. GAIN vs FREQUENCY FOR VARIOUS CIN-
FIGURE 10. GAIN vs FREQUENCY FOR VARIOUS SUPPLY VOLTAGES
5 4 NORMALIZED GAIN (dB) 3 2 1 0 -1 -2 -3 -4
AV=+2 RL=150 RG=270 CIN=0pF
70pF 68pF 56pF 38pF CMRR (dB)
-10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 1K
AV=+5 VS=5V
20pF 2.2pF
-5 100K
1M
10M
100M
10K
100K
1M
10M
100M 500M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 11. FREQUENCY vs GAIN FOR VARIOUS CL
FIGURE 12. CMRR vs FREQUENCY
10 0 -10 PSRR (dB) -20 -30 -40 -50 -60 -70 -80 -90 1K
OUTPUT IMPEDANCE ()
AV=+1 VS=5V
AV=+2 VS=5V 10
1
0.1
0.01 10K 100K 1M 10M 100M 500M 10K 100K 1M FREQUENCY (Hz) 10M 100M
FREQUENCY (Hz)
FIGURE 13. PSRR vs FREQUENCY
FIGURE 14. OUTPUT IMPEDANCE/PHASE vs FREQUENCY
6
EL5102, EL5103, EL5202, EL5203, EL5302 Typical Performance Curves
CH1
32mV
VS=5V RL=150 CL=2.7pF
CH1
32mV VS=5V RL=150 CL=2.7pF
CH2
CH2 100mV
100mV
20ns/DIV
20ns/DIV
FIGURE 15. FALL TIME SMALL SIGNAL
FIGURE 16. RISE TIME SMALL SIGNAL
5V 2V VIN VOLTAGE 264ns
VOLTAGE (1V/DIV)
0V 100mV VS=5V RL=150 CL=2.7pF
2V VS=5V RL=150 CL=2.7pF 10ns/DIV
VOUT
400ns/DIV
FIGURE 17. RISE AND FALL TIME LARGE SIGNAL
FIGURE 18. TURN-ON TIME
768ns 0V
NOISE VOLTAGE (nV/Hz)
AV=+1 RL=150 CL=2.7pF
5V
VS=5V
100
100mV
10
1 10 400ns/DIV
100
1K FREQUENCY (Hz)
10K
100K
FIGURE 19. TURN-OFF TIME
FIGURE 20. EQUIVALENT NOISE VOLTAGE vs FREQUENCY
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EL5102, EL5103, EL5202, EL5203, EL5302 Typical Performance Curves
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
1.2 POWER DISSIPATION (W)
1.4 POWER DISSIPATION (W)
1 1.087W
M
1.2 1.136W 1 1.116W 0.8 0.6 0.4 0.2 0 0 25 50 75 85 100 125 150 SO8 JA=110C/W
0.8 0.6 0.4 0.2 0 543mW
JA =
SO
11 5
P8
C
/1
0
/W
J
SO
A =23
T2 3
- 5/6 0 C /W
QSOP16 JA=112C/W
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (C)
AMBIENT TEMPERATURE (C)
FIGURE 21. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
FIGURE 22. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
0.7 POWER DISSIPATION (W) 0.6 0.5 0.4 0.3 0.2 0.1 0
JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 607mW 488mW MSOP8/10 JA=206C/W POWER DISSIPATION (W) 1 0.8 0.6 0.4 0.2 0
JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 791mW 781mW QSOP16 JA=158C/W
SOT23-5/6 JA=256C/W
SO8 JA=160C/W
0
25
50
75 85 100
125
150
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (C)
AMBIENT TEMPERATURE (C)
FIGURE 23. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
FIGURE 24. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 8

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